Conventionally, a distributed power supply system such as a solar power generation system or wind power generation system which converts DC power generated using solar rays, wind or the like as an energy source to AC power and supplies power in coordination with a power grid is developed.
FIG. 6 is a block diagram for explaining such a distributed power supply system. Each grid generating line and signal line is usually described as two to three (or four) lines, forming a two-phase or three-phase circuit. However, here, each line is represented by a single line for simplification.
In FIG. 6, 1 is a three-phase AC power supply which supplies power to a power system. 2 to 4 are switches. 10 is an inverter circuit for grid connection. 11 is a DC power supply such as a solar cell. 100 is a control circuit which controls the inverter circuit 10. 5 is a load supplied from the power grid of the three-phase AC power supply 1. 6 is a voltage detector which detects the grid voltage of the three-phase AC power supply 1. 7 is a current detector which detects the output current of the inverter circuit 10. 8 is a capacitor. 9 is a reactor.
The inverter circuit 10 is a circuit having semiconductor switching elements connected in a three-phase bridge configuration. The on/off state of the semiconductor switching elements connected in the bridge configuration is controlled, based on a pulse width modulated (PWM) control signal outputted from the control circuit 100. Consequently, AC voltages of three phases are generated at an output end of the inverter circuit 10. This three-phase AC voltage is a voltage made up of a pulse string obtained by PWM of a DC voltage output from the DC power supply 11. An LC filter formed by the reactor 9 and the capacitor 8 eliminates a harmonic component from the three-phase AC voltage made up of a pulse string and thereby converts the three-phase AC voltage to a sine wave voltage. The sine-wave three-phase AC voltage from which the harmonic component is eliminated is outputted to the power grid of the three-phase AC power supply 1.
The control circuit 100 has PLL (phase-locked loop) calculation means 12, three-phase voltage command signal generation means 13, coordinate conversion means 14, output current control means 15, and a gate signal generation circuit 16.
The PLL calculation means 12 has a function of generating an angular frequency ωo coinciding with the phase of grid voltage detected by the voltage detector 6. Specific operations of the PLL calculation means 12 will be described later.
The three-phase voltage command signal generation means 13 generates voltage command signals Vuref, Vvref, Vwref of three phases having a predetermined amplitude, based on the angular frequency ωo generated by the PLL calculation means 12.
The coordinate conversion means 14 performs coordinate conversion of an active current command Idref and a reactive current command Iqref, using the angular frequency ωo generated by the PLL calculation means 12, and thus generates a U-phase output current command Iuref and a W-phase output current command Iwref.
The output current control means 15 carries out Alternate Current Regulation (ACR) control so that the U-phase and W-phase output current commands Iuref, Iwref generated by the coordinate conversion means 14 coincide with output currents Iu, Iw of the inverter circuit 10 detected by the current detector 7. As a result of the ACR control, the output current control means 15 generates correction signals ΔVuref, ΔVvref, ΔVwref for correcting the voltage command signals Vuref, Vvref, Vwref of each phase.
The gate signal generation circuit 16 adds, by each phase, the voltage command signals Vuref, Vvref, Vwref of each phase and the correction signals ΔVuref, ΔVvref, ΔVwref for the voltage commands of each phase, and thus generates modulation signals of each phase. Next, the gate signal generation circuit 16 compares the size of the modulation signals of each phased with a predetermined carrier signal and generates PWM control signals G1 to G6. The control signals G1 to G6 are output to the inverter circuit 10.
The semiconductor switching elements of the inverter circuit 10 are controlled in the on/off state thereof, based on the control signals G1 to G6 generated by the gate signal generation circuit 16. Consequently, AC voltages of three phases are generated at the output end of the inverter circuit 10.
An output voltage control method for an inverter circuit connected to a power grid in this manner is disclosed, for example, in NPL 1.
By the way, such a distributed power supply system is required to stably supply power to a power grid. Therefore, the control circuit 100 controls the frequency and phase of a voltage is output from the inverter circuit 10, based on the phase and frequency of grid voltage. To realize such control, the control circuit 100 of the distributed power supply system shown in FIG. 6 has the PLL calculation means 12.
As an example of the PLL calculation means 12 shown in FIG. 6, FIG. 7 shows a block diagram of the PLL calculation means disclosed in PTL 1.
The PLL calculation means 12 has αβ conversion means 121, dq conversion means 122, proportional-integral control means 123, and VCO (voltage controlled oscillator) means 124. In the following description, the proportional-integral control means 123 is also referred to as PI control means 123.
The αβ conversion means 121 is to convert voltage signals Vu, Vv, Vw of three phases detected by the voltage detector 6 to voltage signals Vα, Vβ of two phases. To the dq conversion means 122, the voltage signals Vα, Vβ are input from the αβ conversion means 121 and a phase signal θ is input from the VCO means 124. The dq conversion means 122 calculates a phase difference component Vq and an in-phase component Vd from the phase signal θ and the voltage signals Vα, Vβ. The PI control means 123 carries out arithmetic control with a proportional-integral controller (PI controller) so that the phase difference component Vq reaches zero and outputs a correction value. A correction angular frequency ωo, obtained by adding this correction value to a target angular frequency ωs* of a grid voltage signal by an adder 126, is outputted to the VCO means 124. The VCO means 124 outputs a phase signal θ corresponding to the input correction angular frequency ωo to the dq conversion means 122.
By this feedback control, the phase is locked when the phase difference component Vd reaches zero. At this point, the phase signal θ coincides with the phase of grid voltage. Therefore, the correction angular frequency ωo is output from the PLL calculation means 12 coincides with the angular frequency of grid voltage.